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| HCC/HCF40100B 32-STAGE STATIC LEFT/RIGHT SHIFT REGISTER .FULLYSTATI .SHI .MULTI .RECI .LI .STANDARDI .QUI .5V,10V,AND15VPARAMETRI .I .100%TESTEDFORQUI .MEETSALLREQUI C OPERATION FT LEFT/SHIFT RIGHT CAPABILITY PLE PACKAGE CASCADING RCULATE CAPABILITY FO OR FIFO CAPABILITY ZED SYMMETRICAL OUTPUT CHARACTERISTICS ESCENT CURRENT SPECIFIED AT 20V FOR HCC DEVICE C RATINGS NPUT CURRENT OF 100nA AT 18V AND 25C FOR HCC DEVICE ESCENT CURRENT REMENTS OF JEDEC TENo TATIVE STANDARD N . 13A, "STANDARD SPECIFICATIONS FOR DESCRIPTION OF "B" SERIES CMOS DEVICES" data in the 32nd stage is shifted into the first stage when the LEFT/RIGHT CONTROL is low and from the 1st stage to the 32nd stage when the LEFT/RIGHT CONTROL is high. EY (Plastic Package) F (Ceramic Frit Seal Package) DESCRIPTION The HCC40100B (extended temperature range) and HCF40100B (intermediate temperature range) are monolithic integrated circuits, available in 16lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF40100B is a 32-stage shift register containing 32 D-type masterslave flip-flops. The data present at the SHIFTRIGHT INPUT is transferred into the first register stage synchronously with the positive CLOCK edge, provided the LEFT/RIGHT CONTROL is at a low level, the RECIRCULATE CONTROL is at a high level, and the CLOCK INHIBIT is low. If the LEFT/RIGHT CONTROL is at a high level and the RECIRCULATE CONTROL is also high, data at the SHIFT-LEFT INPUT is transferred into the 32nd register stage synchronously with the positive CLOCK transition, provided the CLOCK INHIBIT is low. The state of the LEFT/RIGHT CONTROL, RECIRCULATE CONTROL, and CLOCK INHIBIT should not be changed when the CLOCK is high. Data is shifted one stage left or one stage right depending on the state of the LEFT/RIGHT CONTROL, synchronously with the positive CLOCK edge. Data clocked into the first or 32nd register states is available at the SHIFT-LEFT or SHIFT-RIGHT OUTPUT respectively, on the next negative CLOCK transition (see Data Transfer Table). No shifting occurs on the positive CLOCK edge if the CLOCK INHIBIT line is at a high level. With the RECIRCULATE CONTROL low, June 1989 M1 (Micro Package) C1 (Plastic Chip Carrier) ORDER CODES : HCC40100BF HCF40100BM1 HCF40100BEY HCF40100BC1 PIN CONNECTIONS 1/13 HCC/HCF40100B FUNCTIONAL DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol V DD * Vi II Pto t Parameter Supply Voltage : HC C Types H C F Types Input Voltage DC Input Current (any one input) Total Power Dissipation (per package) Dissipation per Output Transistor for T o p = Full Package-temperature Range Operating Temperature : HCC Types H CF Types Storage Temperature Value - 0.5 to + 20 - 0.5 to + 18 - 0.5 to V DD + 0.5 10 200 100 - 55 to + 125 - 40 to + 85 - 65 to + 150 Unit V V V mA mW mW C C C T op T stg Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS Symbol V DD VI Top Parameter Supply Voltage : HC C Types H CF Types Input Voltage Operating Temperature : HCC Types H CF Types Value 3 to + 18 3 to + 15 0 to V DD - 55 to + 125 - 40 to + 85 Unit V V V C C 2/13 HCC/HCF40100B LOGIC DIAGRAM 3/13 HCC/HCF40100B TRUTH TABLES CONTROL Left/Right Control 1 1 0 0 X Clock Inhibit 0 0 0 0 1 Recirculate Control 1 0 1 0 X Action Shift Left Shift Left Shift Right Shift Right No Shift Input Bit Origin Shift Left Input Stage 1 Shift Right Input Stage 32 - DATA TRANSFER Initial State D ata Input 0 X 1 X X Clock Inhibit 0 0 0 0 1 Internal Stage X 0 X 1 1 X= Don't Care. Clock Level Change - -/ -\ - /- - -\ - X Resulting State Internal Stage Q 0 NC 1 NC NC Output NC 0 NC 1 NC 0 = Low level 1 = High level * For Shift-Right Mode Data Input = SHIFT-RIGHT INPUT (Pin 11) Internal Stage = Stage 1 (Q1) Output = SHIFT-LEFT OUTPUT (Pin 4). NC = No change. For Shift-left Mode Data input = SHIFT LEFT INPUT (Pin 6) Internal Stage = Stage 32 (Q32) Output = SHIFT-RIGHT OUTPUT (Pin 12). STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions) Test Conditions Symbol Parameter VI (V) 0/ 5 HCC 0/10 Types 0/15 0/20 0/ 5 HCF 0/10 Types 0/15 V OH Output High Voltage 0/ 5 0/10 0/15 V OL Output Low Voltage 5/0 10/0 15/0 <1 <1 <1 <1 <1 <1 VO (V) Value Unit |I O | V D D T L o w* 25 C T Hi g h * (A) (V) Min. Max. Min. Typ. Max. Min. Max. 5 10 15 20 5 10 15 5 10 15 5 10 15 4.95 9.95 14.95 0.05 0.05 0.05 5 10 20 100 20 40 80 4.95 9.95 14.95 0.05 0.05 0.05 0.04 0.04 0.04 0.08 0.04 0.04 0.04 5 10 20 100 20 40 80 4.95 9.95 14.95 0.05 0.05 0.05 V V 150 300 600 3000 150 300 600 A IL Quiescent Current * TLo w = - 55C for HCC device : - 40C for HCF device. * THigh = + 125C for HCC device : + 85C for HCF device. The Noise Margin for both "1" and "0" level is : 1V min. with VDD = 5V, 2V min. with VDD = 10V, 2.5 V min. with VDD = 15V. 4/13 HCC/HCF40100B STATIC ELECTRICAL CHARACTERISTICS (continued) Test Conditions Symbol Parameter VI (V) VO (V) 0.5/4.5 1/9 4.5/0.5 9/1 0/ 5 HCC 0/ 5 Types 0/10 0/15 0/ 5 0/ 5 HCF Types 0/10 0/15 I OL Output Sink Current 0/ 5 HCC 0/10 Types 0/15 0/ 5 HCF 0/10 Types 0/15 I IH , I IL Input Leakage Current HCC 0/18 Types HCF 0/15 Types Any Input 2.5 4.6 9.5 13.5 2.5 4.6 9.5 13.5 0.4 0.5 1.5 0.4 0.5 1.5 Value Unit |I O | V D D T L o w* 25 C T Hi g h * (A) (V) Min. Max. Min. Typ. Max. Min. Max. <1 <1 <1 <1 5 10 15 5 10 15 5 5 10 15 5 5 10 15 5 10 15 5 10 15 18 Any Input 15 0.3 10 5 -5 V IH Input High Voltage 3.5 7 11 1.5 3 4 -2 - 0.64 - 1.6 - 4.2 - 1.53 - 0.52 - 1.3 - 3.6 0.64 1.6 4.2 0.52 1.3 3.6 0.1 3.5 7 11 1.5 3 4 - 1.6 - 3.2 - 0.51 - 1 - 1.3 - 2.6 - 3.4 - 6.8 - 1.36 - 3.2 - 0.44 - 1 - 1.1 - 2.6 - 3.0 - 6.8 0.51 1.3 3.4 0.44 1.1 3.0 1 2.6 6.8 1 2.6 6.8 10 -5 3.5 7 11 1.5 3 4 - 1.15 - 0.36 - 0.9 - 2.4 - 1.1 - 0.36 - 0.9 - 2.4 0.36 0.9 2.4 0.36 0.9 2.4 0.1 0.3 7.5 1 A 1 pF mA mA V V 1.5/13.5 < 1 V IL Input Low Voltage 13.5/1.5 < 1 I OH Output Drive Current CI Input Capacitance * TLo w = - 55C for HCC device : - 40C for HCF device. * THigh = + 125C for HCC device : + 85C for HCF device. The Noise Margin for both "1" and "0" level is : 1V min. with VDD = 5V, 2V min. with VDD = 10V, 2.5 V min. with VDD = 15V. DYNAMIC ELECTRICAL CHARACTERISTICS (T amb = 25C, C L = 50pF, R L = 200k, typical temperature coefficient for all V DD values is 0.3%/C, all input rise and fall time = 20ns) Symbol t PL H, t P HL Parameter Propagation Delay Time Clock to Shift Left/Right Output Test Conditions V D D (V) Min. 5 10 15 t T HL , tTLH Transition Time 5 10 15 Value Typ. 360 165 115 100 50 40 Max. 720 330 230 200 100 80 ns ns Unit 5/13 HCC/HCF40100B DYNAMIC ELECTRICAL CHARACTERISTICS (continued) Symbol tsetup Parameter Data Setup Time Test Conditions V DD (V) Min. 5 10 15 thold Data Hold Time 5 10 15 tW Clock Input Pulse Width Low Level 5 10 15 tW Clock Input Pulse Width High Level 5 10 15 fCL Maximum Clock Input Frequency 5 10 15 100 20 10 275 100 75 450 230 190 280 150 140 1 2.5 3 Value Typ. 50 10 5 170 75 50 225 115 95 140 75 70 2 5 6 MHz ns ns ns ns Max. Unit WAVEFORMS 6/13 HCC/HCF40100B Output Low (sink) Current Characteristics. Output High (source) Current Characteristics. Typical Propagation Delay Time (clock to shift left right) vs. Load Capacitance. Typical Transition Time vs. Load Capacitance. Typical Dynamic Power Dissipation vs. Clock Frequency . 7/13 HCC/HCF40100B TEST CIRCUITS Quiescent Device Current. Input Voltage. Input Leakage Current. 8/13 HCC/HCF40100B Plastic DIP16 (0.25) MECHANICAL DATA mm MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP. MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 inch TYP. MAX. DIM. P001C 9/13 HCC/HCF40100B Ceramic DIP16/1 MECHANICAL DATA mm MIN. A B D E e3 F G H L M N P Q 7.8 2.29 0.4 1.17 0.22 0.51 0.38 17.78 2.79 0.55 1.52 0.31 1.27 10.3 8.05 5.08 0.307 0.090 0.016 0.046 0.009 0.020 3.3 0.015 0.700 0.110 0.022 0.060 0.012 0.050 0.406 0.317 0.200 TYP. MAX. 20 7 0.130 MIN. inch TYP. MAX. 0.787 0.276 DIM. P053D 10/13 HCC/HCF40100B SO16 (Narrow) MECHANICAL DATA DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8 (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45 (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm TYP. MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.004 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 P013H 11/13 HCC/HCF40100B PLCC20 MECHANICAL DATA mm MIN. A B D d1 d2 E e e3 F G M M1 1.27 1.14 7.37 1.27 5.08 0.38 0.101 0.050 0.045 9.78 8.89 4.2 2.54 0.56 8.38 0.290 0.050 0.200 0.015 0.004 TYP. MAX. 10.03 9.04 4.57 MIN. 0.385 0.350 0.165 0.100 0.022 0.330 inch TYP. MAX. 0.395 0.356 0.180 DIM. P027A 12/13 HCC/HCF40100B Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. (c) 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A 13/13 |
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